The present invention relates to the fabrication of semiconductor-based devices. More particularly, the present invention relates to improved techniques for forming a trench in a silicon layer of a substrate in a plasma processing chamber having independent plasma generation source and ion energy source.
In the fabrication of semiconductor-based devices (e.g., integrated circuits or flat panel displays), trenches may sometimes be formed in a silicon layer of a substrate (e.g., a silicon wafer or a glass panel). It is known that such trenches may be etched in a plasma processing chamber wherein a plasma that is capable of etching the silicon material through openings in a mask (e.g., of photoresist or hard mask) is utilized.
To facilitate discussion, FIG. 1 depicts a simplified layer stack 100, including a mask layer 102 disposed over a silicon layer 104. Mask layer 102 may represent any suitable mask layer such as photoresist or hard mask (e.g., SiO.sub.2, Si.sub.3 N.sub.4, Si.sub.x N.sub.y, Oxynitride, and the like). Silicon layer 104 represents a monocrystal silicon layer of the substrate and may represent the substrate itself (e.g., the semiconductor wafer or the glass panel). To simplify discussion, only some exemplary layers are shown. As is well known, other layers (including, for example, an adhesion layer, seed layer, antireflective coating layer, or another layer) may also be disposed above, below, or in between the shown layers.
In mask layer 102, an exemplary opening 106 is shown through which the etching plasma may enter to remove material of silicon layer 104 to form the desired trench. Note that the term "trench" as employed herein also encompasses other structures etched in the silicon layer such as contact holes, vias, and the like. In the prior art, there is employed a plasma etching process that utilizes a fluorocarbon-based etchant source gas for the trench etch. For relatively low density devices and trenches with relatively low aspect ratios, the fluorocarbon-based plasma etching technique works adequately. However, as the density of semiconductor devices increases on the substrate and/or the aspect ratio of trenches increases, the fluorocarbon-based plasma etching technique has certain limitations.
By way of example, fluorocarbon-based plasma etching tends to result in a fairly low etch rate, which disadvantageously reduces the through put of substrates through the plasma processing chamber. As such, it is a more expensive etch process since fewer substrates can be processed per given unit of time. More importantly, the fluorocarbon-based plasma etching technique is typically regarded as a fairly "dirty" process, i.e., it tends to create particulate contaminants that accumulate on inner surfaces of the plasma processing chamber. Unless the plasma processing chamber is cleaned frequently, the accumulated particulate contaminants may flake off onto the substrate being processed, leading to defects and reducing yield. Generally speaking, the plasma processing chamber employed for the fluorocarbon-based etching needs to be cleaned after 10 to 20 wafers are processed to ensure that the level of particulate contaminant remain acceptably low.
An alternative chemistry for use in etching trenches in the silicon layer is SF.sub.6 /O.sub.2. As a point of clarification, medium density or low density plasma processing systems, as those terms are employed herein, refer to plasma processing systems wherein the plasma density generated is lower than about 10.sup.11 ions per cm.sup.3.
In high density plasma processing chambers (i.e., those producing plasma having a plasma density greater than about 10.sup.12 ions per cm.sup.3), the use of SF.sub.6 /O.sub.2 chemistry is observed to produce commercially unacceptable etch results for the aforementioned high density device and/or high aspect ratio trench etches. For the etch result to be commercial acceptable, criteria pertaining to etch profile, etch rate, mask selectivity, ARDE (Aspects Ratio Dependent Etching, which refers to the disparity in etch rates among features having different feature sizes) or the like, must be met for the design rule being employed. Commercially acceptable etch results are important since they render a given etch process useable in the production of semiconductor products, versus merely possible as an academic exercise and lacking in some etch criteria which renders a process impractical for production usage.
To facilitate discussion, FIG. 2 depicts a trench 202 that has been etched in silicon layer 104 using SF.sub.6 /O.sub.2 as the etchant source gas in a high density, inductively coupled plasma processing chamber. As shown in FIG. 2, mask undercutting occurs in region 204 due to the high degree of lateral etching near the opening of trench 202. Further down, some roughness on the trench inner surface is observed. It is speculated that the roughness in region 206 may be due, in part, to insufficient passivation at these regions.
More significantly, it is observed that the ARDE (Aspect Ratio Dependent Etching) is particularly severe on the substrate. By way of example, a comparison between the etch rate in 0.8 micron trenches with the etch rate in 1.5 micron trenches reveals that the ARDE is nearly 100 percent in one case (i.e., the etch rate in the 1.5 micron trenches is about twice as fast as the etch rate in the 0.8 micron trenches). The high degree of ARDE results in poor etching results in some trenches on the substrate, rendering the SF.sub.6 /O.sub.2 chemistry-based etching technique unacceptable for use in high density/inductively coupled plasma processing chambers.
In view of the foregoing, there are desired improved techniques for etching, using high density plasma processing chambers, trenches in a silicon layer of a substrate.